The present invention relates generally to semiconductor integrated circuit (IC) memory chips or devices, and more particularly to erasable programmable memory devices such as electrically erasable (alterable) programmable read only memories (EEPROMs).
EEPROM devices have the distinct advantage of allowing data to be written and rapidly erased electrically many times over, to permit a user to change the stored data at will while the device is in circuit. In contrast, the older PROM-type devices employ fusible links in which dam is stored according to the condition of the fuses at intersections of the memory array, i.e., the condition of whether or not a fuse is blown. As such, a PROM device is, for all intents and purposes, programmable only once (that is, is non-erasable) since a blown fuse is not reparable.
Another type of erasable programmable memory, the EPROM device, requires exposure of the unhoused structure to ultraviolet (UV) light to change the electrical characteristics of a charged element in order to obtain erasure. Typically, the EPROM is housed in a windowed package (e.g., a ceramic package having a quartz window to expose the silicon), although a more recent version dubbed as "one time programmable" (OTP) is packaged in plastic without a window. As the name indicates, the windowless variety can be programmed only once. For the usual windowed EPROM that has been programmed, however, reprogramming is a major effort. If installed, the device must be removed from its in-system circuit, exposed to UV for a sufficient period of time (typically several hours) to assure complete erasure of the stored data, reprogrammed electrically, and then reinstalled in circuit.
The use of EEPROM devices avoids the need to subject the memory to long periods of outage for erasure. This, then, is the memory device of choice for applications where fast storage changes are required. In the EEPROM structure, a pair of polysilicon gates are separated by a silicon dioxide layer. The oxide also extends below the lower gate to separate it from underlying p-type silicon substrate in which a channel may be established between implanted heavily doped n-type source and drain regions. The oxide thickness between the lower gate and the silicon typically ranges up to about 100 angstroms, which is considerably less than the gate oxide thickness used for EPROM structures.
In operation of the EEPROM, a voltage of suitable magnitude applied across the very thin gate oxide layer induces tunneling of electrons from the substrate to the lower gate. A logical 1 is stored (written) when a write voltage is applied to the upper gate, thus inducing a charge on the lower gate that prevents a channel from forming during a read operation. A reversal of the write voltage causes erasure.
In erasable programmable memory devices such as EEPROMs, where the internal memory is composed of contiguous memory blocks of equal capacity (size), many applications exist in which the user desires to maintain security for some or all of the memory blocks. For example, the user may wish to "write protect" certain ones of the blocks to prevent the data stored in those blocks from being erased and written over.
Prior schemes for offering write protection have had disadvantages. For example, hardware write protection has been offered in which a pin of the device has been made high to provide write protection of the EEPROM, or low to permit the EEPROM to be written to. The entire memory is write protected, rather than simply selected blocks. In a programmable write protection scheme, an address value is stored in the device and every address equal to or greater than the programmed address is write protected. However, this scheme requires a large circuit overhead.
Accordingly, it is a principal object of the present invention to provide improvements in security for erasable programmable memory arrays.
A more specific object of the invention is to provide improved write protection for erasable programmable memory devices of memory size or capacity made up of contiguous blocks of memory, where selected blocks are to be protected.